Lead digital verification engineer
Core
Lead pre-silicon verification of non-volatile memory controller modules and define verification strategy for IP modules.
Role type
Senior IC digital verification engineer (memory controller)
Builds
Non-volatile memory controller IP and SoC subsystems
Domain
Semiconductor / Hardware Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
System Verilog, UVM, RTL simulation, directed verification, constrained random verification, regression testing, functional coverage analysis, SoC architecture knowledge
Preferred skills
Perl, TCL, Python scripting, AI-powered developer assistance tools
Technologies
System Verilog, UVM, Shell, Perl, TCL, Python
Responsibilities
Define digital verification strategy and plan for IP modules; Interface with digital design teams to understand IP subsystem and SoC functionality; Develop, debug, and run System Verilog UVM-based verification environments for RTL/netlist simulation; Create stimulus and assertions, run regression, and analyze code/functional coverage.
Seniority
Senior, hands-on IC
