Analog/Mixed-Signal Layout Engineer
Core
Develop high-quality layouts for advanced data converters, power management circuits, and mixed-signal IP from initial planning through final sign-off.
Role type
Analog/Mixed-Signal Layout Engineer
Builds
High-performance, power-efficient semiconductor solutions for smartphones, smart homes, AI PCs, automotive, and data centers.
Domain
Semiconductor (Fabless), Analog/Mixed-Signal IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Deep sub-micron CMOS and FinFET layout techniques, EM/IR analysis and fix implementation, LDE mitigation, parasitic extraction, Virtuoso L/XL, Calibre, circuit-designer collaboration
Preferred skills
Double/multiple patterning process knowledge, team layout methodology improvement
Technologies
Virtuoso L/XL, Calibre, StarRC, QRC
Responsibilities
Develop block-level and top-level layouts for ADCs, DACs, bias circuits, and LDOs; optimize device matching, reduce noise coupling, and control parasitics; run and interpret EM/IR analysis; generate parasitic extractions and analyze performance degradation; debug runset violations; ensure compliance with advanced process rules.
Seniority
Individual Contributor