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<Data center>Senior Package Integrator

Taipei💼 Full-time🗓 2026-05-25 → 2026-07-22

Core

Lead the development of advanced packaging solutions including CoWoS, 2.5D/3.5D integration, and chiplet-based architectures.

Role type

Senior IC advanced packaging engineer

Builds

Advanced semiconductor packaging solutions for SoCs

Domain

Semiconductor manufacturing / Advanced packaging

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

SoC floorplanning, PPA optimization, timing analysis, congestion management, power-domain boundary definition, PDN design, thermal management, ball/bump map definition, SI/PI analysis, manufacturability assessment, reliability engineering

Technologies

CoWoS, 2.5D/3.5D integration, chiplet architectures

Responsibilities

Coordinate cross-functional alignment on technical requirements and interfaces for packaging solutions; Lead SoC floorplanning to optimize PPA; Partner with the package team to define and refine ball/bump maps meeting SI/PI and reliability requirements

Seniority

Senior, hands-on IC

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