<Data center>Mixed-Signal Digital IC Design Engineer(Serdes, HS Interface)
Core
Designing and integrating Serdes PMA IP architecture, RTL, and verification for high-speed interfaces.
Role type
Mixed-Signal Digital IC Design Engineer (Serdes, HS Interface)
Builds
Serdes PMA IP blocks for high-speed physical layer interfaces
Domain
Semiconductor IC Design, High-Speed Serdes/HS Interfaces
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Serdes PMA IP architecture planning, RTL coding, front-end and back-end integration, IP verification, PHY co-simulation, algorithm implementation and bit-true verification
Responsibilities
Plan Serdes PMA IP architecture, code Serdes PMA IP RTL, integrate Serdes PMA IP front-end and back-end, collaborate with PCS/MAC/DV teams for verification, collaborate with Analog team for PHY co-simulation, collaborate with Algorithm team for implementation and verification