Process Integration Engineer | APTD
Core
Developing and enabling deployment of advanced interconnect technologies and packaging solutions to meet performance, cost, and manufacturability requirements for next-generation semiconductor products.
Role type
Process Integration Engineer (Advanced Packaging & Interconnects)
Builds
Advanced packaging solutions and interconnect technologies for memory and logic devices
Domain
Semiconductor manufacturing (IDM/Foundry), Advanced Packaging, Memory (DRAM/NAND), Logic
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Process integration, Process development, Advanced packaging, Interconnect technologies, Technology roadmap definition, DoE, Root-cause analysis, Manufacturing transfer, Validation planning
Preferred skills
2.5D/3DIC integration, Wafer-level packaging, Fan-out packaging, Wirebond, Microbump, Hybrid bonding, Memory device experience, Logic device experience
Technologies
2.5D/3DIC, Wafer-level packaging, Fan-out packaging, Wirebond, Microbump, Hybrid bonding
Responsibilities
Collaborate with peers and suppliers to develop innovative advanced packaging technologies; Define project timelines and validation plans to qualify new technologies; Enable smooth transitions from development through high-volume production; Anticipate future trends and define technology roadmaps for advanced packaging solutions
Seniority
Mid-to-Senior Level (Levels 4, 5, or MTS)