Signal Integrity Architect – System & IO Architecture
Core
Define SI architectural strategies for high-speed memory and system interfaces, performing early feasibility and scaling analysis for future data rates.
Role type
Senior IC Signal Integrity Architect
Builds
High-speed memory and system interfaces
Domain
Semiconductor / High-speed digital design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SI modeling and simulation, transmission line theory, jitter analysis, loss analysis, crosstalk analysis, high-speed interface design
Preferred skills
Memory interface expertise, high-speed IO standards knowledge, pre-silicon exploration experience, architectural trade-off analysis
Technologies
Channel modeling tools, SI simulation environments
Responsibilities
Define SI architectural strategies for high-speed memory and system interfaces, Perform early feasibility and scaling analysis for future data rates, Build hands-on channel models across package, board, and system, Drive end-to-end SI co-design with IO, package, and system architects, Translate SI insights into electrical requirements and architectural constraints
Seniority
Senior, hands-on IC
