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Staff DDR Analog Characterization Engineer

Chandler, ArizonaFull-time$198,100–$198,1002026-08-13 → 2026-10-07
Hybrid

Core

Validate and characterize next-generation DDR memory interfaces (DDR5, LPDDR6) through electrical margining, signal integrity measurements, and timing analysis to ensure reliable operation across voltage, frequency, and temperature corners.

Role type

Staff IC analog characterization engineer (memory interfaces)

Builds

Industry-leading Arm SoCs with validated DDR memory subsystems (via careerplan.io/jobs/99235243504-staff-ddr-analog-characterization-engineer-at-arm)

Domain

Semiconductor / High-speed memory interfaces

Required skills

DDR/LPDDR memory interface validation, electrical margining, signal integrity analysis, timing analysis, high-bandwidth oscilloscope operation, JEDEC specifications knowledge, silicon process knowledge

Preferred skills

Python scripting for automation, cross-functional collaboration

Technologies

High-bandwidth oscilloscopes, active probes, logic analyzers, signal generators, power measurement instrumentation

Responsibilities

Conduct electrical margining and signal integrity measurements; Perform timing analysis under various operating conditions; Develop and implement test plans and methodologies; Analyze test data to identify and resolve issues; Implement automation tools to improve testing efficiency; Provide detailed documentation and reports on characterization results

Seniority

Staff, hands-on IC with strategic influence