Physical Design Engineer
Core
Physical design engineering for NVIDIA GPU and Mobile chips, focusing on full chip floorplanning, place & route, timing closure, and power/signal integrity analysis.
Role type
Senior IC physical design engineer (VLSI)
Builds
High-performance GPU and mobile system-on-chip (SoC) designs
Domain
Semiconductor / VLSI / GPU and Mobile SoC
Deliverable
production ML models | product features
Required skills
Full chip floorplanning, place & route (P&R), timing closure, power/clock distribution, signal integrity analysis, physical verification, advanced node design flow, EDA tool proficiency (Synopsys/Cadence/Ansys), scripting (Perl/Python/TCL/Makefile)
Preferred skills
FinFET technology knowledge, circuit design, package design, physical verification tools (Synopsys ICV/Mentor Calibre)
Technologies
Synopsys ICC2/DC/PT/STAR-RC, Cadence EDI/Innovus/Voltus, Ansys Redhawk, Perl, Python, TCL, Makefile
Responsibilities
Perform full chip floorplanning, place & route, timing closure, and power/signal integrity analysis; troubleshoot complex design and flow issues; collaborate with RTL, DFT, and Circuit designers
Seniority
Mid-level, hands-on IC