Senior Layout Designer
Core
Design and optimize semiconductor manufacturing products and processes to ensure cost, quality, reliability, and time-to-market efficiency.
Role type
Senior IC analog layout engineer
Builds
Memory and storage solutions (CMOS circuits)
Domain
Semiconductor / VLSI / Analog IC Design
Required skills
CMOS circuit design, VLSI layout, Cadence Virtuoso, LVS, DRC, place and route, standard cell construction, analog layout techniques
Preferred skills
layout synthesis, AI-enabled floor planning tools, innovative process improvement
Technologies
Cadence Virtuoso, Calibre
Responsibilities
Design physical layouts for CMOS circuits, perform place and route operations, utilize LVS and DRC tools for verification, collaborate with Design Engineering and Process Integration groups.
Seniority
Senior, hands-on IC
