Principal Engineer , Memory Design
Core
Lead the design, layout, and optimization of DRAM memory arrays, peripheral logic, and analog circuits, leveraging AI-based tools for automation and verification.
Role type
Principal Engineer, Memory Design (DRAM/Analog)
Builds
High-performance DRAM memory products (DDR5, LPDDR5, HBM) and semicustom memory designs
Domain
Semiconductor / Memory / Analog Circuit Design
Deliverable
production ML models | product features
Required skills
CMOS circuit design, device physics, memory operation, SPICE-based simulation, parasitic extraction, floor-planning, placement, routing, functional/timing/power/reliability analysis
Preferred skills
DRAM design (DDR5, LPDDR5, HBM), NAND memory design, SoC/ASIC semicustom flow, AI/ML-assisted design flows, agentic AI, advanced automation in circuit design
Technologies
SPICE simulators, EDA tools, Micron-specific simulators
Responsibilities
Define semicustom methodology for memory design; oversee layout process including floor-planning, placement, and routing; perform circuit-level verification; collaborate with CAD, EDA, and software teams to integrate AI-driven flows; drive innovation into future memory generations
Seniority
Principal, hands-on IC with strategic oversight