Staff Memory Design Engineer
Core
Design and optimize DRAM memory arrays, peripheral logic, and analog circuits using AI-driven automation and agentic workflows.
Role type
Staff Memory Design Engineer
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor memory design (DRAM, NAND, NOR)
Deliverable
production ML models | product features
Required skills
CMOS circuit design, device physics, memory operation, SPICE-based simulation, parasitic extraction, floor-planning, placement, routing, functional/timing/power/reliability analysis
Preferred skills
DRAM design (DDR5, LPDDR5, HBM), NAND memory design, AI/ML-assisted design flows, SoC/ASIC semicustom flow
Technologies
SPICE simulators, EDA tools, Micron-specific simulators
Responsibilities
Assist with design layout and optimization of memory arrays and circuits; leverage AI tools for schematic optimization and design-space exploration; define semicustom methodology for memory design; oversee layout process including floor-planning, placement, and routing; perform circuit-level verification; drive innovation in future memory generations
Seniority
Senior, hands-on IC