Principal Design Engineer, DRAM
Core
Design and optimize memory circuits from gate-level to full chip implementations for next-generation DRAM technologies.
Role type
Principal Design Engineer (Semiconductor/DRAM)
Builds
Memory arrays, control logic, address decode, datapath, and internal test logic blocks for DRAM chips.
Domain
Semiconductor / Memory / DRAM
Required skills
Semiconductor circuit design, Layout and optimization, Circuit simulation (SPICE), Hardware description languages (Verilog), Device evaluation and modification
Preferred skills
Memory architecture, CMOS device behavior, Reliability considerations, Silicon validation, AI in circuit design
Technologies
SPICE, Verilog
Responsibilities
Design and optimize memory circuits from gate-level to full chip implementations; Lead development of schematic blocks such as memory arrays, control logic, address decode, datapath, and internal test logic; Perform advanced circuit simulations using industry tools to validate performance; Drive architectural decisions related to power, speed, die area, and overall circuit performance; Collaborate with technology development and business units to define design rules, device requirements, and validation strategies.
Seniority
Principal, hands-on IC with strategic influence
