Member of Technical Staff , Memory Design
Core
Design and optimize DRAM memory arrays, peripheral logic, and analog circuits using AI-driven automation and agentic workflows.
Role type
Senior IC memory design engineer (DRAM)
Builds
High-performance DRAM memory products (DDR5, LPDDR5, HBM)
Domain
Semiconductor / Memory / VLSI
Deliverable
production ML models | product features
Required skills
CMOS circuit design, device physics, memory operation, floor-planning, placement, routing, circuit-level verification (functional, timing, power, reliability), AI-based design tools, agentic workflows, automation frameworks, semicustom methodology
Preferred skills
DRAM design (DDR5, LPDDR5, HBM), NAND memory design, SoC/ASIC semicustom flow, patents/publications
Technologies
Micron-specific simulators, industry standard simulators, CAD tools, EDA tools
Responsibilities
Assist with overall design, layout, and optimization of DRAM Memory array/Peripheral Logic/Analog circuits; Accelerate schematic optimization and design-space exploration using AI tools; Oversee and manage the layout process including floor-planning, placement, and routing; Perform circuit-level verification including functional, timing, power and reliability analysis; Define semicustom methodology for memory design; Collaborate with CAD, EDA, and software teams to integrate AI-driven flows.
Seniority
Senior, hands-on IC