Principal Design Engineer
Core
Designing and implementing advanced ASIC micro-architectures for next-generation solid-state drive controllers.
Role type
Principal IC ASIC design engineer
Builds
High-performance storage controllers and silicon
Domain
Semiconductor / Storage / Digital ASIC
Deliverable
production ML models | product features | infrastructure
Required skills
Verilog/SystemVerilog, digital ASIC design methodologies, full design flow (lint, CDC, synthesis, ECO), industry-standard EDA tools (Design Compiler, PrimeTime), large-scale complex project delivery
Preferred skills
AMBA AXI/AHB protocols, storage/memory protocols (NVMe, SCSI, CXL, DDR), verification/CAD tools (ncsim, Formality), Python for automation, AI/ML concepts for EDA productivity
Technologies
Design Compiler, PrimeTime, ncsim, Formality, Python
Responsibilities
Design, implement, and debug complex RTL logic and integrate IP into larger subsystems; Support front-end design flow including lint, CDC, synthesis, and ECO activities; Collaborate with SOC design, verification, STA, and physical design teams; Develop automation scripts to improve design efficiency; Use AI-assisted tools to enhance debugging and code quality
Seniority
Principal, hands-on IC
