IC Packaging Design & Layout Engineer
Core
End-to-end creation of advanced integrated circuit (IC) packaging solutions meeting performance, power, size, and reliability targets for next-generation hardware platforms.
Role type
IC Packaging Design & Layout Engineer
Builds
Advanced IC packages (fan out wafer level, 2.5D/3D interposer, system in package), substrates, interposers, and die-to-die routing.
Domain
Semiconductor packaging and high-speed electronic design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (manufacturable package designs)
Required skills
Package architecture, high-speed layout, signal integrity analysis, design for manufacturability (DFM), SPICE simulation, electromagnetic (EM) simulation, S-parameter analysis, power delivery network (PDN) design, decoupling strategy, substrate vendor management, OSAT coordination
Preferred skills
Siemens Xpedition, Ansys SIwave, Ansys HFSS, Hyperlynx
Technologies
Siemens Xpedition, Ansys SIwave, Ansys HFSS, Hyperlynx
Responsibilities
Lead concept development for advanced packages; Produce detailed layout for substrates, interposers, and die-to-die routing; Own package-level SI/PI strategy; Perform SPICE, EM, and S-parameter simulations; Partner with mechanical engineers on die attach, underfill, molding, and thermal interface materials; Partner with silicon, RF, and board design engineers to co-optimize die floorplans and package interfaces; Author complete package build documentation, specifications, and test plans; Drive solutions to complex problems with limited direction.
Seniority
Mid-to-Senior level (5-10 years experience), hands-on IC
