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ASIC设计工程师

China / Guangdong-Shenzhen,China / Zhejiang-Hangzhou💼 Full-time🗓 2026-07-10 → 2026-07-22

Core

Designing high-speed communication chips including analog circuits (BGR, LDO, ADC, DAC, OPA, PLL, AFE, CDR) and digital logic (RTL design, verification, backend) for high-precision signal chains.

Role type

Senior IC Design Engineer (Analog/Digital)

Builds

High-speed communication chips and precision signal chain components

Domain

Semiconductor / High-speed communication / Analog and Digital IC design

Deliverable

production ML models | product features | infrastructure

Required skills

Analog circuit design, Digital RTL coding, UVM verification environment setup, Physical design and sign-off, EDA tool proficiency, Circuit theory knowledge

Preferred skills

Successful tape-out experience, High-speed Serdes design, Matlab modeling and calibration algorithms, Digital backend platform setup

Technologies

Verilog, UVM, EDA tools, Unix/Linux, Matlab

Responsibilities

Write high-speed communication chip digital design schemes and RTL code, Decompose verification features and write test cases, Perform chip synthesis, timing constraint writing, and layout routing

Seniority

Senior, hands-on IC

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