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Sr. Staff PCB Design Engineer

Santa Clara💼 Full-time🗓 2026-08-28 → 2026-09-26

Core

Lead physical design of high-complexity AI accelerator boards (20+ layers) ensuring clean 112G/224G SerDes signals and robust power delivery for AI silicon.

Role type

Sr. Staff IC PCB Design Engineer (AI Hardware)

Builds

High-density PCIe form factor AI accelerator cards and system baseboards

Domain

AI Hardware / High-Speed Digital Design

Deliverable

production ML models

Required skills

High-speed PCB layout (112G SerDes, DDR5, HBM), Cadence Allegro Constraint Manager, SKILL/Python/TCL automation, HDI/ELIC design, PDN strategy, Stack-up definition, DFM/DFA

Preferred skills

Library Management System creation, PLM/PDM integration, PCB warpage mitigation

Technologies

Cadence Allegro, SKILL, Python, TCL, Megtron 7/8

Responsibilities

Lead full-cycle layout for AI accelerator cards and baseboards; Architect and manage Constraint Manager hierarchy; Develop automation scripts for layout and DRC; Execute layout for PCIe Gen5/6, CXL, and D2D interconnects; Partner on PDN strategy and multi-phase VRM layouts; Drive stack-up definition with low-loss materials; Interface with fabricators for DFM/DFT/DFA compliance

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