Principal FPGA Design Engineer
Core
Lead the full design lifecycle of complex board-level networking products utilizing FPGAs, embedded processors, and advanced system technologies for AI data centers and clusters.
Role type
Principal FPGA system engineer (technical leadership)
Builds
High-speed networking products for AI data centers and bleeding-edge AI clusters
Domain
Networking hardware / FPGA design
Required skills
FPGA architecture design, RTL development (Verilog/SystemVerilog), FPGA flow implementation (synthesis, place & route, timing closure), system integration, hardware debugging, toolchain automation (Python/Tcl)
Preferred skills
12+ years FPGA/SOC experience, leadership of full life-cycle designs, control interfaces (PCIe, I2C, MDIO, QSPI, Ethernet, USB, AXI), AMD/Xilinx Vivado/Vitis/Lattice expertise, CDC analysis, floorplanning
Technologies
Verilog, SystemVerilog, Python, Tcl, Shell, Xilinx Vivado, Vitis, Lattice
Responsibilities
Define FPGA microarchitecture and design specifications, develop and verify RTL code, execute FPGA development flow, collaborate on system bring-up and debugging, conduct design and architecture reviews, automate design workflows
Seniority
Principal, technical leadership & mentorship
