Senior Package Layout Engineer - Hardware
Core
Design and develop sophisticated IC substrate layouts for NVIDIA GPUs and SOCs, optimizing pinout, routing, and power distribution for high-speed/density ASIC packages.
Role type
Senior IC Package Layout Engineer
Builds
High-speed/density ASIC packages and IC substrates
Domain
Semiconductor hardware design (ASIC, GPU, SoC)
Required skills
Substrate layout (wire bond, flip chip), High-speed design signal integrity, PCB layout (HDI), Cadence APD/SiP tool suite, Constraint Manager, Power distribution design, CAD library development
Preferred skills
Virtuoso, Calibre, Valor, Experience with graphics cards/motherboards/line cards
Technologies
Cadence APD, Cadence SiP, Constraint Manager, Virtuoso, Calibre, Valor
Responsibilities
Implement high speed/density ASIC packages, Perform substrate breakout patterns, Optimize package pinout with system-level trade-offs, Conduct package routing/placement/stack-up/reference plane/power distribution, Propose layout design trade-offs, Conduct design feasibility studies for size/cost/performance, Develop symbols and CAD library databases, Develop methodologies to improve layout productivity
Seniority
Senior, hands-on IC
