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Senior ASIC Design Engineer - Agentic AI

US, CA, Santa Clara💼 Full-time💰 $168,000–$168,000🗓 2026-06-26 → 2026-10-07

Core

Design and implement high-performance, area, and power-efficient RTL for SoCs and GPUs using agentic AI solutions and LLM-powered engineering assistants.

Role type

Senior ASIC Design Engineer (Agentic AI) (via careerplan.io/jobs/893395979969-senior-asic-design-engineer-agentic-ai-at-nvidia)

Builds

High-performance SoCs and GPUs for consumer graphics, self-driving cars, and AI platforms

Domain

Semiconductor / VLSI / Artificial Intelligence

Deliverable

production ML models

Required skills

RTL design (Verilog), ASIC design flow, micro-architecture, Python, LLM fine-tuning, multi-agent systems, RAG pipelines, vector databases, digital systems, VLSI design, computer architecture, computer arithmetic

Preferred skills

Experience with AI tools in recruiting processes, proactive problem-solving

Technologies

Verilog, Python, LLMs, RAG, Vector Databases

Responsibilities

Document and deliver design guidelines for high-performance RTL; Develop agentic AI solutions for micro-architecture and RTL implementation; Collaborate with designers and tool owners to meet design requirements; Design and deploy LLM-powered solutions for engineering assistants and dialogue systems; Engage with latest ML/AI advancements to create powerful solutions

Seniority

Senior, hands-on IC