芯片EVB板级PI/PPO验证工程师（芯片平台） - 芯片研发
Core
End-to-end responsibility for post-silicon EVB board-level verification and chip productization mass production support for ByteDance's self-developed chips, ensuring verification quality.
Role type
Senior IC chip verification engineer (post-silicon PI/PPO)
Builds
SOC power domains, power models, and power/speed profiling data for mass production
Domain
Semiconductor design, data center SOC, power integrity, power management
Required skills
Post-silicon power integrity (PI) verification, Power Modeling, Power/Speed Profiling (PPO), oscilloscope and probe configuration, test data analysis, PDN/IR Drop/AC Noise analysis, AVS/DFVS principles, correlation between simulation and measurement (ATE/EVB)
Preferred skills
Advanced process nodes (7nm and under), advanced packaging (2.5D/3D chiplet, SOW), advanced storage (3D Memory, Compute in Memory)
Technologies
SOC, VR, LDO, PDN, ATE, EVB, 7nm, 2.5D/3D chiplet, SOW, 3D Memory, Compute in Memory, AVS, DFVS
Responsibilities
Define and validate chip Bounding Box, design verification strategies and test cases, locate and resolve power integrity issues, generate analysis and evaluation reports
Seniority
Senior, hands-on IC
