芯片封装设计/SIPI（芯片平台） - 芯片研发
Core
Provide chip packaging design solutions including package selection, design, implementation, PinMap definition, and board-level interconnect; analyze and optimize signal integrity (SI) and power integrity (PI) for complex SoCs with high-speed interfaces.
Role type
Senior IC packaging design engineer (SI/PI)
Builds
Chip packaging designs and SI/PI optimized solutions for multi-project, multi-process node SoCs
Domain
Semiconductor manufacturing / Chip packaging / High-speed interface protocols
Required skills
Package selection and design, PinMap definition, Board-level interconnect design, Signal integrity (SI) analysis and optimization, Power integrity (PI) analysis and optimization, High-speed interface protocols (DDR, PCIe, SerDes), EDA tools for packaging and SI/PI, Thermal management and reliability analysis
Preferred skills
Experience with complex SoC packaging, English reading and writing
Technologies
EDA tools for packaging and SI/PI
Responsibilities
Define package selection, design, implementation, PinMap, and board-level interconnect; Collaborate with chip and board design teams to resolve interface issues; Analyze and optimize signal and power integrity for high-speed interfaces
Seniority
Mid-level, hands-on IC
