3DIC系统仿真工程师（存算与AI） - 芯片研发
Core
3DIC chip Signal Integrity (SI) and Power Integrity (PI) sign-off and full-system simulation for AI chips.
Role type
Senior IC 3DIC SI/PI Engineer
Builds
High-efficiency AI chips based on in-memory computing architecture
Domain
Semiconductor / Advanced Packaging / AI Hardware
Deliverable
production ML models
Required skills
3DIC project experience, transistor-level channel jitter simulation, EM electromagnetic simulation, high-speed design theory, mixed-mode power design, SerDes/DDR/HBM PI/SI simulation, advanced packaging (2.5D/3D) knowledge, EDA tools proficiency
Preferred skills
Chip/package/board-level design and test experience, oscilloscope/VNA/spectrum analyzer usage
Technologies
SerDes, DDR3/4, HBM, TSV, 2.5D/3D packaging, EDA tools
Responsibilities
Perform SI/PI sign-off and full-system simulation; Develop multi-DIE stacking and packaging power solutions; Analyze power noise and voltage drop impacts on signal timing; Optimize TSV patterns and packaging isolation structures; Create PI/SI/EMI/EMC design guidelines.
