ASIC验证工程师（RDMA方向）
Core
Design and execute module-level or system-level verification plans for chips, focusing on RDMA protocols.
Role type
Senior IC ASIC verification engineer (RDMA)
Builds
Chip modules and systems
Domain
Semiconductor / Networking
Required skills
UVM methodology, SystemVerilog, C/C++, Python, EDA tools, chip verification flow, tape-out experience
Preferred skills
RDMA protocol knowledge, large-scale network simulation modeling, congestion control, RDMA kernel/user-space drivers, collective communication software
Technologies
UVM, SystemVerilog, C, C++, SystemC, Python, Makefile, EDA tools
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