Fabric Interconnect Design Verification Engineer
Core
Verification of complex flows and block-level designs for Fabric Interconnects, focusing on cache coherency and microarchitectures.
Role type
Senior IC verification engineer (chip interconnects)
Builds
Pre-silicon subsystems and IP blocks for chip products
Domain
Semiconductor hardware design and verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM, System Verilog, Python, Coherent Hub Interface (CHI), AMBA protocols, cache coherency architectures, random-stimulus generation, coverage-based testing, debugging, test plan development
Preferred skills
Generative AI application in verification, scripting for post-processing, mentorship
Technologies
UVM, System Verilog, Python, CHI, AMBA
Responsibilities
Develop UVM-based verification environments and run/debug simulations; define verification strategies and test plans; apply random-stimulus and coverage-based techniques to find bugs; innovate verification methodologies; mentor team members; verify designs utilizing CHI and AMBA protocols across the full product cycle.
Seniority
Senior, hands-on IC
