CareerPlan

Staff Package Design Engineer

Tempe, Arizona, usFull-time2026-11-04 → 2026-11-10

Core

Lead the physical architecture and design of next-generation semiconductor packages, including 2.5D/3D heterogeneous integration and chiplet-based architectures.

Role type

Staff Package Design Engineer (IC Design & Advanced Packaging)

Builds

High-performance semiconductor packages, interposers, and chiplet-based systems

Domain

Semiconductor manufacturing, Advanced Packaging, IC Design

Required skills

Advanced packaging R&D, 2.5D/3D heterogeneous integration, chiplet architecture, high-density interposer design, design rule definition, CAD tool proficiency (Xpedition, Allegro), cross-functional technical leadership, mentorship

Preferred skills

Experience with bridge technologies (EMIB equivalents), RDL, FCBGA, thermal mitigation, signal integrity/power integrity fundamentals

Technologies

Siemens/Mentor Xpedition, Valor NPI, Cadence Allegro Package Designer, SiP Layout

Responsibilities

Lead package layout architecture for heterogeneous integration; Define and optimize package design rules and assembly Best Known Methods; Act as technical focal point for SI/PI, thermal, and platform integration; Manage package design cycle from footprint to manufacturing release; Provide mentorship and establish standardized CAD workflows

Seniority

Staff, hands-on IC design with strategic architecture leadership