Mask Designer 5
Core
Create top-level and cell-level layouts for Rad Hard power management, precision analog, and digital core products targeted at Space markets.
Role type
Senior IC mask designer (analog/mixed-signal)
Builds
Physical layouts and mask data for Rad Hard ICs
Domain
Semiconductor / Space-grade IC design
Required skills
Analog/mixed-signal IC layout, Cadence Virtuoso, physical verification, floor planning, macro/block routing, BCD/SOI processes, device physics basics
Preferred skills
Device physics expertise
Technologies
Cadence Virtuoso, Cadence tools
Responsibilities
Floor planning from top-level to macro/block, create package bond diagrams, design custom analog/mixed-signal cells, verify layouts against circuit and process constraints, execute mask data release and archiving, improve layout design quality using new tools/methods
Seniority
Senior, hands-on IC
