Senior Staff/Principal Engineer, AMS Verification (Power & Analog ICs)
Core
Lead verification of digital content embedded within power, analog, and mixed-signal IC products, ensuring functional and product requirements are met before tape-out.
Role type
Senior Staff/Principal AMS Verification Engineer
Builds
Scalable verification environments, testbenches, agents, scoreboards, and coverage models for PMICs and mixed-signal ICs
Domain
Semiconductor / Power Management ICs / Mixed-Signal ICs
Required skills
SystemVerilog, UVM, assertion-based verification, formal verification, coverage closure, debug methodologies, RTL design, microarchitecture, clock/reset management, serial interfaces (SPI, I2C, UART), DFT/ATPG, gate-level simulation, scripting (Python/TCL/Perl)
Preferred skills
FPGA/emulation techniques, timing-aware verification, post-layout verification, silicon bring-up, device evaluation, root-cause analysis
Technologies
SystemVerilog, UVM, Python, TCL, Perl, Shell, FPGA, Emulation
Responsibilities
Own block-level and full-chip digital verification strategy; develop verification plans and coverage goals; design and develop SystemVerilog/UVM-based testbenches and environments; execute regression, triage, and debug; collaborate on analog-digital interaction models; support DFT, scan, and ATPG checks; mentor verification engineers; drive reusable methodology and automation standards.
Seniority
Senior Staff/Principal, hands-on IC (via careerplan.io/jobs/744000153721255-senior-staffprincipal-engineer-ams-verification-power-analog-ics-at-renesas-electronics)
