Senior VLSI Verification Engineer
Core
Develop and maintain advanced verification environments for complex IPs and SoC integration to ensure functional correctness, robustness, and corner-case behavior.
Role type
Senior IC VLSI verification engineer
Builds
Verification environments, testbenches, and coverage metrics for next-gen chips
Domain
Semiconductor / VLSI / SoC design
Required skills
SystemVerilog, UVM, Python, Git, FPGA emulation, formal verification, mixed-signal simulation, testbench design, coverage closure, root-cause analysis, automation scripting
Preferred skills
Full-chip level verification, reset architecture, power domains, reusable verification components
Technologies
SystemVerilog, UVM, Python, Git, FPGA (via careerplan.io/jobs/D5-00E-DF-073-senior-vlsi-verification-engineer)
Responsibilities
Develop and maintain scalable verification environments; Design and execute comprehensive testbenches and random test suites; Drive coverage closure and analyze metrics; Lead debug and root-cause analysis; Collaborate with architecture, design, and firmware teams; Contribute to methodology and infrastructure improvements
Seniority
Senior, hands-on IC
