Staff Verification Engineer
Core
Architect and execute verification for mixed-signal automotive power management devices (PMICs, switching regulators) ensuring compliance with safety standards.
Role type
Staff IC mixed-signal verification engineer
Builds
Mixed-signal power chips for automotive applications
Domain
Automotive semiconductor / Mixed-signal analog verification
Required skills
Mixed-signal verification environment architecture, Real Number Model (RNM) and AMS model integration, Gate-Level Simulation (GLS) flows, RTL and behavioral simulation, analog block debugging (switched-mode regulators, LDO, bandgap), Verilog/SystemVerilog/SPICE, UVM and coverage-driven verification, cross-domain test correlation (via careerplan.io/jobs/744000152788539-staff-verification-engineer-at-renesas-electronics)
Preferred skills
AI-based verification solutions, leadership and mentoring
Technologies
Spectre, Xcelium, UVM, SystemVerilog, SPICE
Responsibilities
Design and architect mixed-signal verification environments; Develop verification plans ensuring ISO 26262/AEC-Q200 compliance; Lead debugging of complex analog blocks; Set up and optimize GLS flows; Conduct RTL and Gate-Level simulations across PVT corners; Collaborate with Design, ATE, and Silicon Validation teams; Drive continuous improvement of verification tools and methodologies
Seniority
Staff, hands-on IC with strategic oversight
