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Digital Verification Engineer

Tel Aviv-Yafo, Israel💼 Full-time🗓 2026-10-05 → 2026-10-07

Core

Full verification lifecycle ownership for complex digital designs including ISP algorithms, DMAs, and security blocks for mobile, AR/VR, and automotive vision systems. (via careerplan.io/jobs/D4-005-55-D61-digital-verification-engineer)

Role type

Senior IC verification engineer (digital hardware)

Builds

Verification environments and testbenches for advanced imagery sensors

Domain

Semiconductor / Image Signal Processing / Automotive / Mobile

Required skills

SystemVerilog, UVM, Python, Perl, Linux/Unix, regression management, coverage closure, test generation, debug/trace analysis

Preferred skills

ISP algorithm verification, DMA verification, security block verification, MIPI/APB/_AHB protocols, Cadence Xcelium/vManager/Indago, AI tools for verification

Technologies

SystemVerilog, UVM, Python, Perl, Linux, Xcelium, vManager, Indago

Responsibilities

Own full verification lifecycle from planning to coverage closure; Architect and develop verification environments from scratch; Implement SVA and drive code coverage analysis; Debug complex tests and trace analysis; Collaborate with Design, Algorithm, Firmware, and Analog teams

Seniority

Senior, hands-on IC