Logic Digital Verification Engineer
Core
Building and maintaining complex verification environments and executing test plans for IoT chip designs.
Role type
Digital Verification Engineer
Builds
Verification environments and test plans for block-level and full-chip SoC designs
Domain
Semiconductor / IoT / Hardware Verification (via careerplan.io/jobs/F6-003-2A-F46-logic-digital-verification-engineer)
Required skills
SystemVerilog, UVM, SoC verification, HW/SW co-simulation, Python scripting, Unix/Linux, ASIC design flows
Preferred skills
Low Power techniques (UPF), Mixed-signal SoCs, SW/HW co-development
Responsibilities
Define and implement robust SV/UVM verification solutions including test benches and methodologies; Collaborate with Digital, Analog, Software, and System teams to define functional, power, and performance goals.
