Principal Digital Engineer
Core
Define scalable verification and validation methodologies for advanced digital power management products used in AI, datacenter, and high-performance computing applications.
Role type
Principal Digital Engineer (Mixed-Signal Verification Strategy)
Builds
System-level verification layer connecting analog behavior, digital implementation, firmware, and silicon validation for power management ICs.
Domain
Semiconductor / Power Management / Mixed-Signal Verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Mixed-signal verification strategy, system-level verification planning, analog/mixed-signal design knowledge, correlation methodologies across models/simulation/emulation/silicon, automation of verification results, documentation of verification methodology, cross-functional team alignment, defining measurable pass/fail criteria and coverage expectations.
Preferred skills
Digital multiphase controllers, DC/DC converters, voltage regulators, power management ICs, model-to-silicon correlation, behavioral modeling, Verilog-AMS, SystemVerilog RNM, MATLAB, Python, SIMPLIS, verification automation, data analysis, test infrastructure, control loops, stability, latency, quantization, noise, telemetry, reusable verification frameworks.
Technologies
Verilog-AMS, SystemVerilog RNM, MATLAB, Python, SIMPLIS
Responsibilities
Define mixed-signal verification strategy for digital power controllers; Develop system-level verification plans covering sensing paths, ADC/DAC behavior, PWM paths, telemetry, compensation, control-loop behavior, latency, quantization, noise, limits, sequencing, and corner behavior; Establish correlation methodologies across behavioral models, RTL, analog/mixed-signal simulations, emulation, bench validation, and silicon measurements; Define measurable pass/fail criteria, coverage expectations, reference scenarios, and evidence requirements for architecture and product decisions; Collaborate with systems, analog design, digital design, firmware, design verification, validation, applications, and software/tool teams; Support automation of verification results, including consistent metrics, plots, waveforms, summaries, and structured outputs for engineering review; Identify verification gaps early and help teams close ambiguity between system intent, implementation behavior, and validation evidence; Document verification methodology, interface assumptions, test intent, correlation expectations, and residual risks clearly for technical and leadership audiences.
Seniority
Principal, strategy & mentorship
