Senior Memory circuit design verification engineer
Core
Senior IC verification engineer for advanced memory circuits (DDR5/6, LPDDR5/6), focusing on gate-level simulation, testbench development, and AI-assisted verification automation.
Role type
Senior IC memory circuit design verification engineer
Builds
Full-chip gate-level custom designs for high-speed memory products
Domain
Semiconductor / Memory Storage / Digital Logic
Required skills
SystemVerilog, UVM, PLI coding, DRAM/SRAM architecture knowledge, timing analysis (Setup/Hold), gate-level simulation with delays, AI-assisted verification tools
Preferred skills
Experience with DDR5/DDR6/LPDDR5/LPDDR6, AI-based automation deployment, cross-functional collaboration
Technologies
Verilog, SystemVerilog, UVM, PLI, simulation tools
Responsibilities
Guide verification effort direction, simulate/analyze/debug pre-silicon full chip designs, develop test cases/stimulus for functional coverage, develop verification methodology and environments, co-work on new verification flows, maintain test benches and run regressions, identify pain points for AI-based automation
Seniority
Senior, hands-on IC
