Sr Engineer, Design Enablement
Core
Develop and define Power Distribution Network (PDN) and Physical Verification (PV) flows and methodologies for System-on-Chip (SoC) designs at low geometry nodes (3/5/16nm) to meet objectives.
Role type
Senior IC Design Enablement Engineer (PDN & PV)
Builds
SoC designs and IP level objectives
Domain
Semiconductor / VLSI / Physical Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
PDN analysis (IR Drop & EM), Physical Verification (PV), EDA tools proficiency, Scripting (PERL/TCL/Python), Flow definition, Requirement management, Vendor evaluation, Debugging (LVS/DRC/ERC/ANTENNA/ESDLUP), Automation
Preferred skills
Experience on lower tech-nodes, Methodology deployment, Change management
Technologies
EDA tools, PERL, TCL, Python
Responsibilities
Develop and define PDN & PV flow & methodology for SoC & IP level objectives; Work with EDA Vendors to review and benchmark latest tools and flows; Drive PDN & PV methodology & automation across the organization; Debug PV issues and IR-EM-Power issues independently.
Seniority
Senior, hands-on IC
