Senior IC Packaging Engineer
Core
Define and drive high-performance, low-power packaging architectures for advanced IC and System-in-package (SiP) products, leading efforts from technology path finding through production ramp.
Role type
Senior IC Packaging Engineer (System-in-Package & Chiplet Architect)
Builds
Advanced IC and SiP packages utilizing 2.5D, chiplet-based designs, and heterogeneous integration
Domain
Semiconductor manufacturing, Advanced Packaging, Chiplet Integration
Required skills
Package architecture design, Chiplet integration strategies, High-speed SerDes/PHY interface design, Substrate stack-up definition, DFM guidelines, SI/PI analysis, Thermal and mechanical trade-offs, OSAT/Foundry engagement
Preferred skills
UCIe protocol expertise, Silicon interposer design, Advanced RDL techniques, Multi-gigabit interface implementation
Technologies
UCIe, PCIe, CXL, LPDDR5, 2.5D Fan-out, RDL, Silicon Interposers, OSAT, Foundry tools
Responsibilities
Serve as technical authority for IC and SiP packaging across multiple products, Own package architecture and technology roadmap, Lead chiplet-based packaging strategies, Perform and guide hands-on package design and physical layout, Define substrate stack-ups and materials, Drive SI/PI, thermal, mechanical, and reliability trade-offs, Lead external engagement with OSATs and foundries
Seniority
Senior, hands-on IC
