Staff Engineer Mask Design
Core
Develop and verify custom IC layouts, floorplan blocks, and top-level routing for advanced semiconductor technologies.
Role type
Staff IC Mask Design Engineer
Builds
Custom analog and digital IC layouts
Domain
Semiconductor / IC Design
Required skills
IC layout design, Design Rule Checking (DRC), Layout Versus Schematic (LVS), Semiconductor manufacturing processes, Floorplanning, Top-level routing
Preferred skills
Siemens EDA (Mentor Graphics), Calibre DRC/LVS, Cadence, Virtuoso
Technologies
Siemens EDA, Calibre, Cadence, Virtuoso
Responsibilities
Develop and verify custom layout, Create and modify complex analog & digital layouts, Floorplan blocks from scratch, Top level routing, Verify LVS, DRC related flows, Participate in reviews with layout leads and design team
Seniority
Senior, hands-on IC
