Staff Engineer
Core
Drive Physical Verification, Reliability Sign-off, Power Grid Design, and Analog/Mixed-Signal Integration for complex low-power SoCs targeting IoT and MCU applications.
Role type
Staff Engineer (Physical Design & Verification)
Builds
Complex low-power System-on-Chip (SoC) designs for IoT and Microcontroller Unit (MCU) applications
Domain
Semiconductor / VLSI Design / Low-power SoC
Required skills
Physical Verification (PV), ESD, Reliability Sign-off, Power Grid Design, Static/Dynamic EM/IR Analysis, I/O Planning, Package Co-design, Analog/Mixed-Signal IP Integration, Scripting (Shell, Perl, Tcl), Low-power design techniques
Preferred skills
Experience with 40nm, 28nm, 22nm nodes, WireBond and FlipChip packaging, Flow and methodology improvement
Technologies
VLSI Design, Physical Design, STA, DFT, RTL, DV, Power Grid Sign-off tools
Responsibilities
Drive Physical Verification, ESD, and Reliability Sign-off activities; Perform Physical Design and Timing Closure; Conduct Power Grid Design and EM/IR Analysis; Lead I/O Planning and Package Co-design; Drive Analog and Mixed-Signal IP Integration; Develop and improve design flows and sign-off processes
Seniority
Senior, hands-on IC
