CareerPlan

Staff Packaging Engineer

San JoseFull-time$170k–$205k2026-11-09
HybridVisa sponsorship offered

Core

Develop and optimize semiconductor packaging solutions from silicon die through PCB-level integration, supporting advanced packaging development, structural/thermal analysis, and manufacturing readiness.

Role type

Staff IC packaging engineer (semiconductor)

Builds

Semiconductor packages (2.5D/3D integration, hybrid bonding) for AI datacenters, chip design, and consumer electronics

Domain

Semiconductor manufacturing / Advanced packaging

Required skills

Semiconductor package development, Structural and thermomechanical simulation (FEA), Assembly process optimization, Failure analysis, Cross-functional collaboration, Manufacturing readiness

Preferred skills

PhD in relevant engineering, Advanced packaging (TSV, fan-out, chiplets, heterogeneous integration), Experience with CMs/OSATs, SI/PI fundamentals

Technologies

ANSYS, FEA tools, EDA tools

Responsibilities

Define package stack-ups and interface requirements, Perform structural and thermal simulations, Develop assembly processes (flip-chip, die attach, molding), Execute qualification plans per JEDEC standards, Support root cause analysis for reliability issues, Collaborate with R&D, suppliers, and customers

Seniority

Staff, hands-on IC with mentorship