Advanced Package Technology Principal Engineer
Core
Design, model, and optimize advanced multi-chip-module (MCM) architectures and flip-chip BGA packages for high-speed photonic engines powering AI supercomputing.
Role type
Principal IC Package Mechanical FEA Engineer
Builds
High-performance packaging solutions for advanced ASICs, co-packaged fiber-optic transceivers, and complex chip-stacking approaches (3DIC, hybrid copper bonding, heterogeneous integration).
Domain
Semiconductor packaging, photonics, AI infrastructure, high-performance computing
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Advanced packaging technologies (flip-chip, FOWLP, 2.5D/3D integration, chiplet architectures, TSVs), thermo-mechanical materials behavior, semiconductor packaging processes (die attach, underfill, molding, bumping, reflow), FEA simulation (Ansys Classic/Mechanical, Abaqus), model calibration with empirical data, lab-level experiment design, root cause analysis, manufacturing constraint balancing
Preferred skills
None stated
Technologies
Ansys Classic, Ansys Mechanical, Abaqus
Responsibilities
Perform FEA simulations to evaluate stress, strain, warpage, delamination, thermal cycling, and reliability risks; Define simulation requirements and deliver actionable design/process recommendations; Support technology road mapping by assessing new materials and interconnect structures; Lead DOE studies and sensitivity analyses; Collaborate with cross-functional teams to ensure robust, scalable package architectures
Seniority
Principal, hands-on IC with strategic influence
