Expert IC Package Design Lead
Core
Lead physical implementation strategy for advanced IC packaging solutions enabling high-performance connectivity silicon for AI clusters.
Role type
Expert IC Package Design Lead (Senior IC)
Builds
High-performance connectivity chips (CXL, Ethernet, NVLink, PCIe, UALink) for AI infrastructure
Domain
Semiconductor / AI Infrastructure / High-Speed Connectivity
Deliverable
production ML models | product features
Required skills
IC package design (BGA, FCBGA, FCCSP), package architecture & integration, signal integrity (SI), power integrity (PI), thermal management, OSAT engagement, DFM, tape-out ownership
Preferred skills
AI/networking interface experience, chiplet/heterogeneous integration, package reliability standards (JEDEC, IPC)
Technologies
Cadence APD / SiP, organic substrates, advanced laminate, interposers, CoWoS (2.5D/3D)
Responsibilities
Own end-to-end package design from architecture to high-volume manufacturing; Define package technology selection and stack-ups; Lead SI/PI/thermal analysis; Collaborate with silicon and system teams; Interface with OSATs and vendors for DFM; Lead risk assessment and failure analysis
Seniority
Senior, hands-on IC
