Staff Engineer, Physical Design
Core
Leading the layout process and top-level integration for Memory/Logic/Analog circuits, including floor-planning, placement, routing, and sign-off.
Role type
Staff Engineer, Physical Design
Builds
Memory/Logic/Analog circuits (DRAM, NAND, NOR)
Domain
Semiconductor / VLSI Physical Design
Required skills
Floor-planning, placement, routing, timing closure, DRC/LVS/EM/IR sign-off, Tcl/SKILL/Python automation, block-level APR flow, partitioning, repeater/feedthrough insertion
Preferred skills
AI flow integration, cross-group collaboration, mentorship
Technologies
Tcl, SKILL, Python, LEF, DEF, GDS, SDC, ILM, ETM
Responsibilities
Lead layout process (floor-planning, placement, routing); Perform top-level virtual flat placement and global routing; Own partition creation and pin optimization; Implement full APR flow and STA sign-off; Automate flows using Tcl/SKILL/Python; Collaborate with Marketing, Test, and Process Integration groups.
Seniority
Staff, hands-on IC with mentorship
