Silicon Validation Senior Engineer
Core
Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power world class products.
Role type
Senior IC ASIC validation engineer
Builds
ASIC blocks and SoCs for high-performance, low-power products
Domain
Semiconductors / ASIC Design
Required skills
Analog and mixed signal circuits, high-speed links (DDR PHY, Serdes), Tx/Rx equalization techniques (de-emphasis, CTLE, DFE), DDR protocols, cross-functional collaboration
Preferred skills
High-speed digital circuits, memory testing, lab testing
Technologies
DDR PHY, Serdes, CTLE, DFE
Responsibilities
Design and validate analog/mixed-signal circuits, implement equalization techniques, collaborate with design and ATE teams
Seniority
Senior, hands-on IC
