Staff Design Engineer - HIG HBM Design
Core
Design and validation of mixed-signal and PHY-adjacent circuit blocks for next-generation High Bandwidth Memory (HBM) solutions.
Role type
Senior IC analog/mixed-signal design engineer (HBM/PHY)
Builds
High-performance, scalable memory solutions and silicon bring-up
Domain
Semiconductor / Memory / Analog & Mixed-Signal
Required skills
Analog/mixed-signal circuit design, SPICE simulation, Verilog-A/AMS modeling, SystemVerilog, VLSI design flows, Linux development, AI-assisted tools
Preferred skills
Parasitic extraction, Monte Carlo simulation, HBM architecture knowledge, high-speed interface concepts, silicon debug, Python/MATLAB scripting
Technologies
Cadence Virtuoso, Spectre, HSPICE, Xcelium/AMS, VCS/Verdi, SystemVerilog, UVM, Python, MATLAB
Responsibilities
Support design and integration of PHY-adjacent mixed-signal circuits; Develop behavioral models for system-level verification; Perform block-level SPICE and mixed-signal simulations; Assist with validation, parasitic modeling, and calibration checks; Collaborate on integration, debug, and silicon bring-up readiness
Seniority
Senior, hands-on IC