SoC Physical Design CAD Engineer (Staff/Sr Staff)
Core
Drive the development, deployment, and support of Physical Design methodologies, flows, and automation for complex SoC programs.
Role type
Staff SoC Physical Design CAD Engineer
Builds
Scalable PD infrastructure and automation flows for SoC implementation
Domain
Semiconductor / VLSI / SoC Physical Design
Required skills
Physical Design flows (Floorplanning, PnR, CTS, Routing, IR/EM, Signoff), Tcl, Python, Perl, Shell scripting, EDA tools (Cadence, Synopsys), Timing/Power/Area optimization, Flow validation and regression automation
Preferred skills
Advanced technology nodes (7nm and below), STA, IR/EM, Power Integrity, Physical Verification, AI/ML-driven design automation
Technologies
Tcl, Python, Perl, Shell, Cadence, Synopsys
Responsibilities
Develop and maintain Physical Design flows covering Floorplanning, PnR, CTS, Routing, IR/EM, and Signoff; Build automation and infrastructure using Tcl, Python, Perl, and Shell scripting; Drive methodology improvements for timing, power, area, and design convergence; Collaborate with PD, STA, CAD, and EDA vendors to evaluate and deploy new tools; Debug flow, tool, and methodology issues; Drive flow validation, regression automation, and deployment across advanced technology nodes; Provide technical leadership and mentor junior engineers
Seniority
Staff, hands-on IC with mentorship
