Principal Engineer, ASIC Design
Core
Designing next-generation solid-state drive controllers by defining micro-architectures, developing RTL, and ensuring designs meet performance and timing goals.
Role type
Principal ASIC Design Engineer
Builds
High-performance SSD controllers and silicon
Domain
Semiconductor / Storage / ASIC Design
Deliverable
production ML models | product features
Required skills
Verilog/SystemVerilog, Digital ASIC design methodologies, Full design flow, Industry-standard EDA tools (Design Compiler, PrimeTime), Large-scale complex project management
Preferred skills
AMBA AXI/AHB protocols, Storage/Memory protocols (NVMe, SCSI, CXL, DDR), Verification/CAD tools (ncsim, Formality), Python for automation, AI/ML concepts for EDA
Technologies
Verilog, SystemVerilog, Design Compiler, PrimeTime, ncsim, Formality, Python, NVMe, SCSI, CXL, DDR, AMBA AXI, AMBA AHB
Responsibilities
Design, implement, and debug complex RTL logic and integrate IP into larger subsystems; Support front-end design flow including lint, CDC, synthesis, and ECO activities; Collaborate with SOC design, verification, STA, and physical design teams; Develop automation scripts to improve design efficiency; Use AI-assisted tools to enhance debugging and code quality
Seniority
Principal, hands-on IC
