Architect
Core
Define, architect, and guide the development of next-generation, high-performance ASICs for AI accelerators, networking, and datacenter computing workloads.
Role type
Senior IC ASIC Architect
Builds
High-performance ASICs (AI accelerators, networking, datacenter computing)
Domain
Semiconductor / Hardware Design
Deliverable
production ML models
Required skills
ASIC architecture, micro-architecture, SystemVerilog/Verilog, C/C++, SystemC, computer architecture (CPU/GPU cores, caches, fabric, memory hierarchies), EDA tools (Synopsys Design Compiler, Cadence Genus), performance modeling
Preferred skills
AI/ML accelerator design, high-performance networking silicon, pre-silicon emulation, Python/Tcl/Perl scripting
Technologies
SystemC, TLM, Ethernet, PCIe, UCIe, DVFS
Responsibilities
Lead creation of Architectural Design Specifications (ADS) and Micro-architecture Specifications (MAS); Develop high-level performance models; Optimize chip-level and block-level architecture for PPA; Partner with RTL, verification, physical design, firmware, and software teams; Drive architectural trade-off studies and design reviews; Define advanced power management strategies; Mentor junior engineers
Seniority
Senior, hands-on IC
