Senior Subsystem & SoC Design Engineer
Core
Design and verification of complex subsystems (GPU, Control) and testchips for SoCs targeting edge, physical, and cloud AI applications.
Role type
Senior IC SoC Design Engineer
Builds
Fully integrated, optimized subsystem designs incorporated into SoCs
Domain
Semiconductor / SoC Design
Deliverable
production ML models
Required skills
System Verilog, Verilog HDL, RTL design, static design checks, power and clock domain crossing, synthesis, computer architecture, UNIX scripting
Preferred skills
Arm System Architectures, AMBA standards, C/C++, assembly language, Functional Safety (ISO 26262, IEC 61508)
Technologies
System Verilog, Verilog HDL, Python, Perl, UNIX shell
Responsibilities
Develop RTL and design intent deliverables (SDC, UPF), integrate IPs, run design checks, write micro-architecture specifications, review test plans, debug design issues, optimize designs
Seniority
Senior, hands-on IC
