CareerPlan

Sr. Staff, Signal Integrity and Power Integrity Engineer

Westlake Village, CA, USFull-time$143k–$211k2026-10-19 → 2026-11-10
Citizens or permanent residents only

Core

Develop advanced microelectronic packages for semiconductors supporting 448 Gb/s data rates, focusing on signal and power integrity, electrical design, and modeling.

Role type

Senior IC package development engineer (high-speed)

Builds

Advanced microelectronic packages for enterprise, cloud, and AI architectures

Domain

Semiconductor / High-speed digital and analog IC packaging

Required skills

EM simulation (Ansys HFSS, SI-Wave, Cadence Clarity), IC package layout (APD, PADS), 2.5D/3D package development, SI/PI analysis, Python scripting, VNA/TDR measurements, high-speed signaling theory, power plane design, EMI/EMC debugging

Preferred skills

Co-Packaged Optics experience, thermal/mechanical analysis, channel simulations (MATLAB, ADS), new product introduction track record

Technologies

Ansys HFSS, SI-Wave, Cadence Clarity, APD, PADS, Spectre, ADS, HSpice, PowerSI, MATLAB

Responsibilities

Package development, electrical design, modeling, and characterization; interface with package suppliers to select technology and ensure manufactability; collaborate with IC designers and marketing to develop package specs; automate SI, PI, and packaging activities using scripting

Seniority

Senior, hands-on IC