Physical Design Engineer
Core
Lead physical design development for high-end custom silicon chips (e.g., Trainium, Graviton) used in AWS cloud infrastructure.
Role type
Senior Physical Design Engineer (RTL2GDS)
Builds
Custom semiconductor chips for cloud compute and networking
Domain
Semiconductor / Cloud Infrastructure
Deliverable
production ML models | product features
Required skills
RTL2GDS flow expertise, sign-off activities (timing/physical verification), advanced node implementation, EDA tool proficiency (Synopsys/Cadence), power/performance/area optimization
Preferred skills
Full-chip experience, high-speed design, multi-voltage/low-power design
Technologies
Synopsys, Cadence, RTL, GDS, floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, physical verification
Responsibilities
Execute full RTL2GDS flow including floorplanning, synthesis, CTS, P&R, STA, and verification; Define timing constraints and design-backend convergence; Optimize macros/clusters for PPA; Develop design flows and signoff methodologies; Mentor team members